To demonstrate how
we can improve chip design productivity, we
are offering a 14-day free trial of our flagship product to
qualified prospects. Fill out a basic qualification form, and
our representative will contact you on the same business day.|
Adeptix helps chip designers
and architects expand their expertise by providing custom-designed
Whether your team is just getting started or you
have experienced developers who wish to pursue more advanced topics,
we can meet your needs. You can enrol in any of our standard
workshops, or alternatively we can deliver on-site training
tailored for your particular project requirements.
The workshops are developed and presented by engineering experts with many years
of experience in hardware design and verification.
INTRODUCTION TO FORMAL
In order to leverage
the advantages and avoid the limitations of the static formal
verification methods, it is important to understand the basic
principles behind the formal verification. During our hands-on
workshops, you will learn the main principles of formal
verification: model checking and theorem proving.
The workshop covers an
overview of model checking with Binary Decision Diagrams (BDD) and
introduction to the Computational Temporal Logic (CTL) and Linear
Temporal Logic (LTL).
yet descriptive examples illustrate the formal verification
methodology and its place in the overall verification process.
Assertion-based Verification (ABV)
is a verification methodology that makes assertions a key element of
verification, ensuring that key design properties are thoroughly verified.
Assertions benefit design and verification by removing ambiguity from
specifications, detecting errors early in the design cycle and reducing the
number of errors in subsequent stages of production.
Many existing EDA tool vendors
integrated assertion-based verification languages into their verification tools.
It is essential for the design community to ramp up and utilize the benefits
assertion-based verification brings to the project.
The Adeptix assertion-based
verification workshops enable quick and effortless adoption of assertions into
projects by delivering an in-depth understanding of the language and providing a
sound verification methodology to exploit it.
With its assertion-based
verification workshops, Adeptix provides a quick and efficient introduction to
assertion-based design and
verification, enabling designers to utilize the power of assertion-based
verification immediately after completing the course. During the workshops,
you will receive hands-on
examples related to your particular design and verification challenges.
TCL SCRIPTING IN CHIP DESIGN
In today's design
organizations, virtually all EDA tools
contain embedded Tool Command Language (TCL) interpreters. A good knowledge of TCL is
essential for the effective utilization of expensive and complex EDA tools.
The TCL for EDA workshop is the fastest and most effective way for
engineers to understand the powerful capabilities of TCL and become proficient in this language.
By offering TCL for EDA
training, Adeptix is leveraging its vast TCL/TK development and an
advanced EDA tool expertise. Our expertise in the field is
well-known and recognized worldwide, as it is evident from a
reputable TCL for EDA
TCL for EDA
is an open-source repository of articles, tools, scripts and applications.
The repository was created by Adeptix's Founder and CEO Alexander Gnusin in
since then the site has become a reputable resource widely popular among chip
designers and verification engineers worldwide.
Review on TCLforEDA in EE design - 2003
Review on TCLforEDA in EE design - 2002
Adeptix's TCL for EDA workshops
offer examination of important case studies and teach powerful TCL
techniques used in the chip design automation
process. The workshop topics vary depending on
the level of expertise, target applications and project needs of the
participants. Among the topics covered in the workshops are the following:
TCL for Synthesis, STA, DFT
TCL for Verification: writing
TCL test and
controlling simulation run
TCL for Project Environment:
TCL for EDA tools
interoperability and efficient
TCL/TK for Add-Ins and
TCL/TK for in-house EDA tools
By providing TCL for EDA workshops, Adeptix
helps its customers make significant improvements in efficiency
and productivity at all stages of the chip design
where TCL is involved.
Adeptix Inc. is now a research partner of IBM. This partnership will
help promote IBM's advanced verification solutions in Canada,
whereby Adeptix will gain access to IBM's state-of-the-art
formal verification tools and
services. Adeptix welcomes the opportunity to begin
a research relationship with one of the world's most renowned
If you would like to receive more information about our
technology, please fill out a short contact page.